Yellowstone Ground Noise and Bypass Capacitors
I’m working on what I hope will be the final hardware changes for the Yellowstone 2.1 PCB. Among these are changes to my capacitor usage and placement strategy. In my previous posts I discussed intermittent problems that looked to be caused by ground bounce, VCC sag, or both. Apple II expansion cards only have a single ground pin on the motherboard connector, so they’re prone to ground noise when signals with fast rise and fall times cause large transient currents. Among several methods that I’ve used for mitigating this problem, one not-so-obvious strategy is to add bypass capacitors on the +12V, -12V, and -5V power supplies, even if the card doesn’t use those supplies.
Apple IIgs Technote #68 says:
Right now Yellowstone doesn’t use or bypass the +/-12V supplies; it just routes them through to the disk drive connectors. -5V is completely unused, and there’s nothing at all connected to that supply pin. I had actually forgotten there even was a -5V supply. (Maybe this could be leveraged somehow for current-limiting of Macintosh drives?)
Why does bypassing unused supplies help anything? Even after doing lots of reading about current loops and ground bounce and impedance, I have to admit I don’t really understand it. I read a T.I. paper that discussed how bypass capacitors help reduce the area of current loops, but I don’t see how that’s true for bypass capacitors on unused supplies, where there’s no path back to the chip that’s sourcing or sinking current. The Apple technote mentions “improved ground by providing additional AC ground paths”, which makes a little more intuitive sense to me. I imagine the bypass capacitors as acting like tiny batteries that work to maintain the voltage between their two terminals. As long as +12V, -12V, and -5V are stable, then bypass capacitors on those supplies will work to keep local ground at 0V by sourcing or sinking small amounts of current as necessary.
I probably wouldn’t really care why it helps, and would just trust that it does, except that I need to know what types and values of bypass capacitors to use, in what locations. Without a better understanding of the theory of why it helps, I’m uncertain how to proceed.
The Apple technote specifically says electrolytic or tantalum capacitors, but doesn’t mention ceramic, which would normally be my go-to for this. I’m not sure why they omitted ceramic.
For the capacitor value, Apple doesn’t say anything. Is a standard 0.1 uF appropriate? I believe the 0.1 uF rule-of-thumb is related to the rise and fall times of typical ICs, and an assumption that the capacitor is placed within a few millimeters of the IC supply pin. But when there’s no specific chip being bypassed, how do you determine the appropriate value? Would a larger value like 1 uF make more sense?
Then there’s the question of placement. I can’t place the bypass capacitors near the IC supply pins, because there are no ICs using +12V, -12V, or -5V. Should I put the capacitors near the board’s supply pins on the motherboard connector? Or maybe in the middle of the board?
My best guesses are that a ceramic capacitor would be fine as long as its voltage rating is high enough, the capacitor should be placed close to the motherboard connector, and the value should be something like 1 uF or 10 uF. Or maybe multiple values with multiple capacitors per supply. I don’t want to rain down tons of extra capacitors though, because the number of discrete components on the PCB is already higher than I’d like.
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I looked at three other Apple II disk controller cards to see what they did: a UDC short card, a Liron, and a Disk 5.25 card. None of them connect -5V to anything. For the +/-12V supplies, here’s what I saw:
Disk 5.25: -12V has no caps, +12V has a 0.1uF ceramic cap near the motherboard connector and a second one near the disk drive connector.
Liron: -12V and +12V both have 0.1 uF ceramic caps near the motherboard connector.
UDC: -12V has a single 0.1 uF ceramic (?) cap in a random-seeming location, +12V has three parallel caps in a random-seeming location. They are 22 uF electrolytic, 0.1 uF ceramic, and a third one without a printed value. I’m not positive the smaller ones are ceramic – they’re in old-school glass capsules and printed 104Z 25U 50V.
Looks like the unknown ones might be this:
https://electronics.stackexchange.com/questions/483491/what-kind-of-capacitor-is-this-can-anyone-describe-the-25u-50v
01.uF 50V ceramics
Arg… can’t type: 0.1uF 50V ceramics
Those are the right numbers, but the wrong style of package. The ones on the UDC look like glass capsules with axial leads, and a component inside the glass. I’m guessing it’s just an older style of ceramic packaging, but I’ve never seen it before.
Yeah I figured the packaging wasn’t right. Kind of looks like a surface mount component wrapped up in a through-hole shell!
Why do the extra caps work? Think of them as the electric equivalent of a dampener and a spring (as found four times in almost any car). All supply lines are long, slightly elastic sticks, well fixed at the PSU, other end (extension card) loose. Add one dampener + spring between GND and +5V and it will become harder to change the distance (voltage) between them, but GND can still bounce up and down together with +5V. Add the extra three dampener + spring systems between the other sticks and GND and moving GND away from its idle position will become harder.
OK, why do they really work? It does not make much sense to have extra caps on unused rails as long as you consider DC behaviour. For AC behaviour, especially at frequencies above a few Hz, you need to think differently:
First, all DC sources (battery, PSU) are simply GND when thinking in AC mode. (Technically, they are GND plus a DC offset that you ignore.) A good DC source has an impedance close to zero, which is a short circuit in AC mode. Wires and PCB traces are inductors, parallel wires / PCB traces are capacitors. The impedance of capacitors reduces with rising frequencies, the impedance of inductors rises with rising frequencies. So, all traces and wires carrying GND and supply voltages behave (ignoring phase differences between current and voltage) more and more like resistors, making things worse with rising frequencies. At the same time, capacitors behave more and more like short circuits.
Imagine having a 100 Ohm resistor (randomly choosen value) in each supply line coming from the PSU, including GND. Now you need to get rid of AC noise, so you want a low-impedance (low resistance) path to PSU GND to short it out. Without any decoupling, all you have is a 100 Ohm line called GND. Add some good decoupling to +5V, and you effectively have two 100 Ohm lines in parallel, about 50 Ohm (plus some resistors in the decoupling capacitors). That’s better, right? You can load the noise source much more, reducing the noise level. Even if the decoupling capacitors also have an impedance of 100 Ohm, you connect 200 Ohm in parallel to 100 Ohm, resulting in 67 Ohm to GND.
Now, do the same trick again with the -5V line. You don’t connect anything but a good decoupling between -5V and GND. AC-wise, you now have the 100 Ohm line in parallel with twice 100 Ohm plus the decoupling capacitors’ resistance), that’s roughly 33 Ohm. With the 100 Ohm capacitor, that’s 100 Ohm in parallel to 200 Ohm in parallel to another 200 Ohm, resulting in 50 Ohm to GND.
But hey, there are still two supply lines, +12V and -12V. Let’s do the trick again. 5 times 100 Ohm in parallel, 10 Ohm to GND. That will surely dampen AC noise better than a single 100 Ohm line. Even with the 100 Ohm capacitors, 100 Ohm in parallel to four times 200 Ohm, you get 33 Ohm to GND.
So, how to you get an AC-only short circuit capacitor? Ideally, any capacitor would do. The higher the capacity, the lower the impedance. Unfortunately, real-world capacitors have an ESR (low, but not zero), and an inductivity. Mechanically large capacitors have a larger inductivity, simply due to long wires and long ways along the electrodes. So at some point, the inductivity makes them useless for high frequencies. Add another capacitor in parallel, with smaller, shorter electrodes and thus less inductivity. If needed, add yet another one, even smaller. For small logic circuits, you can usually get away with two capacitors, one that takes care of the lower frequencies, around 10 µF +/- one order of magnitude, and another ceramic one two or three orders of magnitude smaller (i.e. 10 nF to 100 nF).
If in doubt, have at least pads for three different capacitors in parallel at each supply pin, and try if using two is sufficient. A few empty pads don’t cost you anything, but give you the option to add more capacitors if needed. Also, try to have pads that can accept two different cases, a smaller one and a larger one. That way, you can easily switch to a larger capacitor if needed.
The location: You want a low-impedance path, i.e. wide, short traces. As GND is the weak point of the Apple, I would place the capcaitors as close to GND and the supply pins of the edge connector as possible, to get a low-impedance path to PSU GND. Having wide and short traces to the supply pins of any logic ICs should also help. A simple way to have at least one wide trace is to use a GND plane, or at least to fill unused areas with GND. If you fill both sides with GND, consider GND stitching, i.e. adding several vias (spaces 1 to 2 mm apart, in a grid) to have a low-impedance path between the GND planes on both sides.
The more that I think about it, I’m not convinced these small value bypass capacitors on unused supplies are going to do diddly-squat. Just like with normal bypass caps, a 0.1 uF bypass cap will be virtually useless if it’s located 50 or 100 mm from the IC where ground bounce is a problem, because the trace impedance between IC and cap will be too high. That won’t magically change just because the cap is between +12V and ground instead of +3.3V and ground. And I’m not going to route +12V and -12V all over the PCB just so I can use them for additional bypass caps at each IC.
A larger value capacitor on unused supplies *might* be useful, even if it’s stuck in a random corner of the PCB, since the trace impedance wouldn’t be as important for those. Something like 1 uF or 10 uF maybe. But then those would be functioning more like additional bulk capacitors instead of like bypass capacitors, and it seems like it would be addressing a different problem that I don’t have.
Any benefit that could come from having bypass caps on the +/-12 and -5 supplies would come from capacitors placed as possible to the connector. Basically, the purpose of the capacitors would be to make it so that in cases where the direction of current flow in the ground pin would be opposite that of every other pin, one could have some additional current flow through in that same direction the other supply pins. On your own board, running +12/-12 traces and placing bypass caps on them near other components could yield slightly better results than leaving the board empty in such places, but inferior results to simply running more ground traces. Likewise, adding three more ground connections on the edge connector would yield much better results than adding bypass caps to the other supply wires. On the other hand, adding bypass caps on your board is something you can do; adding more ground pins on the connector isn’t.
As for how effective it would be, it could be reasonably effective if Apple recognized the shortcomings of only having a single ground pin, and placed bypass caps on all the supplies near each expansion connector. If Apple has 0.1uF caps on each supply near the connector you’re plugged into, and you have three caps likewise, those six caps would together behave as though you had a three supplemental ground wires each with a 0.05uF cap in series. If, however, the motherboard has no bypass caps on any of those supplies anywhere near the expansion card connectors, any 0.1uF caps you place on your board would be grasping at empty air.
I think the real fixes for your problems will be the addition of series resistors and the avoidance of situations where all eight data bus pins switch in the same direction simultaneously, either of which would be sufficient to solve your problems. If four pins are switching on one direction and the other four are switching in the other direction, transient ground current will be roughly zero. If four pins switch in one direction and the other four are held at a constant state, not only will transient ground current be limited to four pins’ worth of switching rather than eight, but the four pins which aren’t moving will be solidly connected to bus capacitance which is probably roughly equal to that of the pins being switched. This won’t give you quite an additional 50% reduction in ground currents, but it will nonetheless help considerably, so if you precharge the bus to a pattern where half the bits are set your worst-case peak ground currents will probably be 1/3 of what they would be when switching all eight pins from 00 to FF or vice versa.
If you add resistors, the non-switching data-bus pins won’t be able to share ground currents as effectively as they could before, but the ground currents with resistors will still be less than without them. So if the resistors by themselves would cut peak switching currents by 75%, the combination of resistors plus precharging would cut it by more than 80% (if the resistors slow down the precharge to the point that the second set of bits gets switched before the first has fully precharged the bus, the 4+4 switching might not provide a full 50% reduction in current, but in that scenario the currents would be low enough not cause trouble).
Yes, it does seem that pre-charging the bus to a 10101010 pattern has reduced the severity of ground bounce enough to get things working. The resistors and bypass caps on unused supplies are just extra insurance, I suppose.
The Apple IIe logic board has four capacitors next to each expansion card connector, presumably for bypassing the four voltage supplies, although these capacitors don’t appear in the IIe schematics.
The Apple IIgs doesn’t have any visible capacitors next to the expansion card connectors, but its schematic shows there should be bypass caps on all four supplies at each connector. They’re probably on the bottom of the logic board where I can’t easily see them.
What’s your intuition about a good value for the series resistors on the data bus? I was planning to start with 33 ohms, which seems to be a common value for this type of use.
If you have a capacitor between GND and a supply voltage, you can consider both GND and the supply voltage to be connected at this point for return currents. This means that the routing of the supply voltage can participate in the return path for signals.
I don’t know anything about Apple devices (just here for the generally interesting posts), but for ribbon cables, it’s common to have GND on every other wire as shield/return path for the data lines. Often, some of these GND lines are replaced by supply voltages because these can also fulfill the same purpose, but only if you have bypass capacitors close to the connectors on either side.
This also applies to unused supply lines. From your device’s perspective, a return current can go through a GND pin of your IC, through the GND routing (ideally plane) on your PCB, through the bypass capacitor close to the connector, through the unused supply line, through the matching bypass capacitor on the other PCB to use the GND routing on the other PCB.
My intuition would be to use 100 ohms and see how rise/fall times look. Beyond the peak-current benefits, using higher resistance may reduce the possibility of stressing the motherboard if your board outputs anything on the bus when it isn’t supposed to. Doubling the resistance may cut the amount of power dissipated by the mother board components’ drive transistors by a factor of more than four, which would almost certainly be a good thing.