Tiny CPU Rebirth?
With the Backcountry Data Logger more or less finished (just waiting for the PCB), my thoughts have returned to my neglected Tiny CPU project. I did a huge amount of design work on Tiny CPU about a year ago, finishing the complete CPU design in Verilog, as well as a companion design called Tiny Device for bank switching and peripheral I/O. I even built a test board using the target CPLD (a 128-macrocell Altera EPM7128), so I could experiment with JTAG programming and various construction issues. But then progress stalled, and there’s been nothing further for a year.
I lost interest in Tiny CPU. Why? I don’t fully understand it myself, but two reasons in particular are big contributors:
Questionable Value – There are lots of small soft CPU cores out there, with probably 100 different designs on opencores.org alone. Some of the better ones like PicoBlaze provide a very capable CPU that still fits a pretty small device. Or on the other end of the scale, soft CPUs like MCPU are academic masterpieces, fitting into the smallest devices, even if they aren’t very capable or practical as CPUs. Tiny CPU occupies an awkward middle ground where it requires nearly as large a device as PicoBlaze, yet provides not much more capability than MCPU. So what’s the point?
Construction Fatigue – After completing the Verilog design work, all that remained was to actually build a computer using Tiny CPU. I say “all” with some sarcasm, because designing the required PCB and working out all the necessary connections between the twin CPLDs and SRAM and ROM is a huge job, not to mention writing all the software needed to make it work. At the time, I was really much more interested in the CPU design work than the construction aspect of the project.
Not too much has changed since then, except that I’m more interested in custom PCB design and construction than I was before. I also hate to see a project abandoned half-finished, so I’m considering returning to Tiny CPU with a different focus. I can’t do much about the questionable value of Tiny CPU, but honestly, who ever said any of my projects had value? I can do something about the construction question, though, so that’s where I’ll focus my attention.
Enter the Max II
The original Tiny CPU design called for an Altera EPM7128, a comparatively old 5V device in a PLCC package, allowing for through-hole soldering with a PLCC socket. Tiny CPU and Tiny Device each required a separate CPLD, so there would be two of them on the computer board. I insisted on the EPM7128 because I wasn’t confident I could solder the surface mount packages that most newer devices use, and also because I liked the challenge of fitting 128 macrocells.
I’m now looking at using an Altera Max II, which is a much more modern CPLD with the equivalent of roughly 192 or 440 macrocells in the two smallest sizes. The Max II is a 3.3V device, so this change would involve moving all the other components in the system to 3.3V as well. Fortunately 3.3V SRAM, Flash ROM, and LCDs are pretty easy to find, so that’s not an issue. The only challenge would be the PS/2 keyboard interface. The keyboard data and clock signals are unidirectional in the Tiny CPU design, and use an open collector and pull-up resistor instead of actively driving 5V, so that wouldn’t be a problem. However, the keyboard itself would require a 5V supply.
Switching to the Max II would entail combining Tiny CPU and Tiny Device into a single CPLD, creating something that’s a bit more like a microcontroller than a traditional CPU. The Max II comes in a 100-pin TQFP package with 0.5mm pin spacing, so it would be a real challenge to solder, but I’ve been told repeatedly that it can be done.
The Max II also has a few other advantages. It has a built-in clock generator and power-on reset circuitry, allowing me to delete two external parts from my original design. It also has 1KB of internal Flash memory, which might be useful for bootstrapping.
The final advantage of the Max II, especially the 440 macrocell-equivalent version, is that it would provide some breathing room to recover from mistakes. The original Tiny CPU and Tiny Device designs both just barely fit the EPM7128, and any bugs discovered after construction might require fixes that would push them over the capacity of the device. Some combination of the tight fit and age of the device also gave Altera’s synthesis software problems: if I synthesized, back-annotated the result, and synthesized again, it would fail to fit the second time. That meant that I couldn’t use back-annotation or pin constraints, and any trivial Verilog change might result in new pin assignments that no longer matched the board.
Of course, with a larger device, the very resource constraints that motivated the original CPU design would no longer apply. It might now be possible to increase the address space beyond 10 bits, or add some of the additional address modes that didn’t fit before. I’ve decided I would ignore these opportunities, though, and instead focus on implementing the original design in new hardware. I don’t really have the enthusiasm to revisit the whole CPU design part of the project, so the project would be an example of a generic “small” soft CPU realized in hardware, rather than an exercise of optimizing a CPU design to the size of a particular device.
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A small problem with level conversion for the PS/2 keyboard interface: while it’s true that the keyboard signals are open collector with a pull-up resistor, it doesn’t look possible to pull-up to 3.3V. The issue is that some (all?) keyboards already have pull-up resistors to 5V internally. Experimentally, I think mine has an internal pull-up for the data line, but not the clock.
This is a double-whammy, since it means not only that a 3.3V pull-up will be unworkable, but also that level consersion with a simple voltage divider (two resistors) will be unworkable. So it looks like I’ll need a level converter chip like the 74LVC244. Reportedly some PS/2 keyboards work fine with a 3.3V supply, but it’s not something that can be relied on in general.
Can you sort of clamp the voltage with a resistor in series and then a diode to the 3.3v line or something like that?
Anyway, very interesting project, I’m glad to see you working on it again and interesting in what you achieve 🙂
As the pullups are not active you can simply clamp them with zener diodes or shunt regualtors.
Both clock and data should have a pullup in the keyboard.
Doh, I wish I’d seen your comments just a bit sooner! I used a 74LVC08 to do level conversion of the keyboard signals, as well as the serial in from my 5V FTDI USB-to-serial cable.
It’s too late this time, but I’m interested in hearing more about the alternatives John and Lee mentioned. I’ll admit my knowledge of regulators and diode regulation is pretty hazy. Could you guys explain further what you had in mind? What would the circuit look like?
This page shows the method I meant using a diode in the section entitled “Diode -” http://www.sparkfun.com/tutorials/65
My circuit is simply a zener, or shunt regulator, between the signal line ond 0V. This will only work for lines with resistive pullups but is bidirectional.
The advantage of using a zener is that you ony need the one component per signal. The advantage of using a shunt regulator, such as a TL431, in place of a zener is a lower dynamic impedance.
The sparkfun reference is reasonable but their description of the MOSFET circuit infers that it doesn’t work for signals from the 5V to the 3V3 side. It does, it is bidirectional. Just don’t get the 3V3 and 5V sides mixed up. Also R3 should not be needed with keyboards as they have their own pullups and R2 is not needed if the 3V3 side has its own pullups.
Thanks, you guys have given me a lot to think about. John’s suggestion (3.3v pullup and series diode) looks like it would work to me. Lee’s zener looks like it wouldn’t work, though, if I understand correctly.
From what I understand, the current through the zener must be some minimum amount in order for it to operate in reverse breakdown, otherwise the voltage will not be regulated to 3.3v. I’m having some trouble understanding the datasheets, but it seems like the minimum is somewhere in the 5 mA to 20 mA range. If the value of the pull-up inside the keyboard is 10K, then you will never get 20 mA (5v / 10K = 0.5 mA). Or stated another way, there’s a maximum value for the resistor in a zener regulator, and it’s probably around 200 ohms for this case. http://en.wikipedia.org/wiki/Zener_diode hints at this in the section beginning “The value of R must satisfy two conditions:”. Have I misunderstood?
Side question: how do you read zener datasheets like http://www.fairchildsemi.com/ds/1N/1N5227B.pdf? I assume Iz is current in the zener region, but what is Izk and Ir? Where’s the secret decoder ring for this datasheet? An actual graph with the points of interest labeled with real numbers would be nice.
If the current is below the minimum needed then the voltage won’t be regulated but it will be less than the zener voltage.
Iz, Izt or some variation thereof is the current at which the zener was characterised. This doesn’t mean you have to run it at that current, it’s just a typical test current for that device.
Izk is the zener knee current at which the zener starts regulating. For the 1N5226B this is 0.25mA which gives a maximum pullup value of (5V-3V3)/.25mA = 6.8K, less than your 10K pullup, but devices such as MMSZ4684T1 or 1N4684 are characterised at 50uA which would give a working pullup value of at least (5V-3V3)/.05mA = 34K (The deltaV for the 1N4684 is characterised at 10uA and 100uA so Izk will be less than the minimum of these.)
Ir is the leakage current at some fixed voltage that is below the zener voltage. For the 1N5226B this is given as 25uA at a voltage of 1V and for the 1N4684 it is given as 7.5uA at 1.5V
Graphs for zeners usually cover a whole family and usually have normalised values. No real numbers there.
I quite like the MOSFET solution on the sparkfun page with the BSS138 but haven’t tried it.