Variable Size Instructions
My analysis of the advantages of fixed-size instructions proved to be badly flawed. The improvements I saw when switching to a 16-bit fixed instruction size were not what I originally thought: the size and speed gains came from the reduction in address size, which reduced the size of many instructions, and sped up their execution. The gains had nothing to do with the fact that all instructions were now a fixed size. In fact, going to a fixed size made matters worse for instructions like push and increment, which were now larger and slower.
Fortunately, this was almost trivially easy to fix. With just a few lines changed in the assembler and Verilog source, I was able to restore all the implicit instructions to a single byte, while keeping address-oriented instructions at two bytes (with an embedded 10 bit address). That provides the best of both worlds:
Variable Size, 16-bit addr | Fixed Size, 10-bit addr | Variable Size, 10-bit addr | |
---|---|---|---|
macrocells | 119 | 112 | 116 |
verification program size (bytes) | 2055 | 1890 | 1629 |
verification program execution time (clocks) | 835 | 574 | 552 |
The gains aren’t amazing, but every little bit helps. The space savings are especially nice, since with the 10-bit address space, I’ll need to make the most of every byte.
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One other detail: the values in the table for program size are for a hex-encoded ROM image. The actual in-memory sizes of the programs are one-third the size of the hex file. Otherwise, even the smallest of the programs wouldn’t fit in a 10-bit address space with its 1024 bytes of memory.